1. Field of the Invention
The present invention relates to a programmable logic device with which the configuration of hardware can be changed and a method for manufacturing a semiconductor device using the programmable logic device.
2. Description of the Related Art
In a semiconductor device called a programmable logic device (PLD), a logic circuit is composed of an adequate number of programmable logic elements (basic blocks), and the function of each programmable logic element and interconnections between the programmable logic elements can be changed after manufacture. PLDs show flexibility in a reduction in development period and a change in design specification as compared with conventional application specific integrated circuits (ASICs) and gate arrays, which is advantageous, thus being widely used in recent years.
The PLD needs a memory device for storing data (configuration data) on the function of each programmable logic element and the connections between the programmable logic elements. This makes it difficult to avoid an increase in circuit size and cost per chip of the PLD; thus, PLDs are often employed for production of a prototype or small-quantity production. Meanwhile, a method for reducing the cost per chip is proposed in which a photomask corresponding to a circuit configuration that is tested with a PLD is formed and an ASIC is manufactured therewith. This method makes it possible to provide a semiconductor device with desired specifications at relatively low cost by changing only masks for the upper few layers as in gate arrays.
Non-Patent Document 1 below proposes a configuration in which an SRAM for storing configuration data is formed using polysilicon TFTs over a CMOS logic circuit functioning as a programmable logic element and, after configuration data is determined, an ASIC is manufactured with a new photomask corresponding to the data. The ASIC does not include the SRAM and has only the CMOS logic circuit on the chip; thus, an increase in circuit size can be suppressed.